AMD Accelerated Processing Unit

The AMD Accelerated Processing Unit (APU), formerly known as Fusion, is the marketing term for a series of 64-bit microprocessors from Advanced Micro Devices (AMD), designed to act as a central processing unit (CPU) and graphics processing unit (GPU) on a single die. APUs are general purpose processors that feature nearly discrete integrated graphics processors (IGPs), which generally are a class above what would normally be termed as "integrated" graphics.

Not to be confused with auxiliary power unit.
AMD Accelerated Processing Unit
Release date2011
CodenameFusion
Desna
Ontario
Zacate
Llano
Hondo
Trinity
Weatherford
Richland
Kaveri
Godavari
Kabini
Temash
Carrizo
Bristol Ridge
Raven Ridge
Picasso
Matisse
IGP
Wrestler
WinterPark
BeaverCreek
ArchitectureAMD64
ModelsDesktop E2 Series
Cores2 to 8
Transistors32 nm 1.178b (Llano)
  • 32 nm 1.303b (Trinity)
  • 32 nm 1.3b (Richland)
  • 28 nm 2.41b (Kaveri)
  • 14 nm 4.95b (Raven Ridge)
API support
Direct3DDirect3D 12
OpenCL1.2
OpenGL4.1+

AMD announced the first generation APUs, Llano for high-performance and Brazos for low-power devices in January 2011. The second generation Trinity for high-performance and Brazos-2 for low-power devices were announced in June 2012. The third generation Kaveri for high performance devices were launched in January 2014, while Kabini and Temash for low-power devices were announced in the summer of 2013. Since the launch of the Zen microarchitecture, Ryzen APU's have released to the global market first as Raven Ridge on the DDR4 platform, after Bristol Ridge a year prior.

The Sony PlayStation 4 and Microsoft Xbox One eighth generation video game consoles both use semi-custom third generation low-power APUs.

Intel CPUs with integrated HD Graphics also have a CPU and GPU on a single die, but they do not offer HSA support.

History

The AMD Fusion project started in 2006 with the aim of developing a system on a chip that combined a CPU with a GPU on a single die. This effort was moved forward by AMD's acquisition of graphics chipset manufacturer ATI[1] in 2006. The project reportedly required three internal iterations of the Fusion concept to create a product deemed worthy of release.[1] Reasons contributing to the delay of the project include the technical difficulties of combining a CPU and GPU on the same die at a 45 nm process, and conflicting views on what the role of the CPU and GPU should be within the project.[2]

The first generation desktop and laptop APU, codenamed Llano, was announced on 4 January 2011 at the 2011 CES show in Las Vegas and released shortly thereafter.[3][4] It featured K10 CPU cores and a Radeon HD 6000-series GPU on the same die on the FM1 socket. An APU for low-power devices was announced as the Brazos platform, based on the Bobcat microarchitecture and a Radeon HD 6000-series GPU on the same die.[5]

At a conference in January 2012, corporate fellow Phil Rogers announced that AMD would re-brand the Fusion platform as the Heterogeneous System Architecture (HSA), stating that "it's only fitting that the name of this evolving architecture and platform be representative of the entire, technical community that is leading the way in this very important area of technology and programming development."[6] However, it was later revealed that AMD had been the subject of a trademark infringement lawsuit by the Swiss company Arctic, who used the name "Fusion" for a line of power supply products.[7]

The second generation desktop and laptop APU, codenamed Trinity was announced at AMD's 2010 Financial Analyst Day[8][9] and released in October 2012.[10] It featured Piledriver CPU cores and Radeon HD 7000 Series GPU cores on the FM2 socket.[11] AMD released a new APU based on the Piledriver microarchitecture on 12 March 2013 for Laptops/Mobile and on 4 June 2013 for desktops under the codename Richland.[12] The second generation APU for low-power devices, Brazos 2.0, used exactly the same APU chip, but ran at higher clock speed and rebranded the GPU as Radeon HD7000 series and used a new IO controller chip.

Semi-custom chips were introduced in the Microsoft Xbox One and Sony PlayStation 4 video game consoles.[13][14]

A third generation of the technology was released on 14 January 2014, featuring greater integration between CPU and GPU. The desktop and laptop variant is codenamed Kaveri, based on the Steamroller architecture, while the low-power variants, codenamed Kabini and Temash, are based on the Jaguar architecture.[15] In November 2017, HP released the Envy x360, featuring the Ryzen 5 2500U APU, the first 4th generation APU, based on the Zen CPU architecture and the Vega graphics architecture.[16]

Features

Heterogeneous System Architecture
Main article: Heterogeneous System Architecture

AMD is a founding member of the Heterogeneous System Architecture (HSA) Foundation and is consequently actively working on developing HSA in cooperation with other members. The following hardware and software implementations are available in AMD's APU-branded products:

TypeHSA featureFirst implementedNotes
Optimized PlatformGPU Compute C++ Support2012
Trinity APUs		Support OpenCL C++ directions and Microsoft's C++ AMP language extension. This eases programming of both CPU and GPU working together to process support parallel workloads.
HSA-aware MMUGPU can access the entire system memory through the translation services and page fault management of the HSA MMU.
Shared Power ManagementCPU and GPU now share the power budget. Priority goes to the processor most suited to the current tasks.
Architectural IntegrationHeterogeneous Memory Management: the CPU's MMU and the GPU's IOMMU share the same address space.[17][18]2014
PlayStation 4,
Kaveri APUs		CPU and GPU now access the memory with the same address space. Pointers can now be freely passed between CPU and GPU, hence enabling zero-copy.
Fully coherent memory between CPU and GPUGPU can now access and cache data from coherent memory regions in the system memory, and also reference the data from CPU's cache. Cache coherency is maintained.
GPU uses pageable system memory via CPU pointersGPU can take advantage of the shared virtual memory between CPU and GPU, and pageable system memory can now be referenced directly by the GPU, instead of being copied or pinned before accessing.
System IntegrationGPU compute context switch2015
Carrizo APU		Compute tasks on GPU can be context switched, allowing a multi-tasking environment and also faster interpretation between applications, compute and graphics.
GPU graphics pre-emptionLong-running graphics tasks can be pre-empted so processes have low latency access to the GPU.
Quality of service[17]In addition to context switch and pre-emption, hardware resources can be either equalized or prioritized among multiple users and applications.

Feature overview

The following table shows features of AMD's APUs (see also: List of AMD accelerated processing units).

CodenameServer Basic Toronto
Micro Kyoto
DesktopMainstream Carrizo Bristol Ridge Raven Ridge Picasso Renoir
Entry Llano Trinity Richland Kaveri
Basic Kabini
MobilePerformance Renoir
Mainstream Llano Trinity Richland Kaveri Carrizo Bristol Ridge Raven Ridge Picasso
Entry Dalí
Basic Desna, Ontario, Zacate Kabini, Temash Beema, Mullins Carrizo-L Stoney Ridge
Embedded Trinity Bald Eagle Merlin Falcon,
Brown Falcon		 Great Horned Owl Ontario, Zacate Kabini Steppe Eagle, Crowned Eagle,
LX-Family		 Prairie Falcon Banded Kestrel
Platform High, standard and low power Low and ultra-low power
ReleasedAug 2011Oct 2012Jun 2013Jan 2014Jun 2015Jun 2016Oct 2017Jan 2019Mar 2020Jan 2011May 2013Apr 2014May 2015Feb 2016Apr 2019
CPU microarchitecture K10 Piledriver Steamroller Excavator "Excavator+"[19] Zen Zen+ Zen 2 Bobcat Jaguar Puma Puma+[20] "Excavator+" Zen
ISAx86-64x86-64
Socket Desktop High-end N/A N/A
Mainstream N/A AM4
Entry FM1 FM2 FM2+[lower-alpha 1] N/A
Basic N/A N/A AM1 N/A
Other FS1 FS1+, FP2 FP3 FP4 FP5 FP6 FT1 FT3 FT3b FP4 FP5
PCI Express version 2.0 3.0 4.0 2.0 3.0
Fab. (nm) GF 32SHP
(HKMG SOI)		 GF 28SHP
(HKMG bulk)		 GF 14LPP
(FinFET bulk)		 GF 12LP
(FinFET bulk)		 TSMC N7
(FinFET bulk)		 TSMC N40
(bulk)		 TSMC N28
(HKMG bulk)		 GF 28SHP
(HKMG bulk)		 GF 14LPP
(FinFET bulk)
Die area (mm2)228246245245250210[21]15675 (+ 28 FCH)107?125149
Min TDP (W)351712104.543.95106
Max APU TDP (W)10095651825
Max stock APU base clock (GHz)33.84.13.73.83.63.73.81.752.222.23.23.3
Max APUs per node[lower-alpha 2]11
Max CPU[lower-alpha 3] cores per APU48242
Max threads per CPU core1212
Integer structure3+32+24+24+2+11+1+1+12+24+2
i386, i486, i586, CMOV, NOPL, i686, PAE, NX bit, CMPXCHG16B, AMD-V, RVI, ABM, and 64-bit LAHF/SAHF
IOMMU[lower-alpha 4]N/A
BMI1, AES-NI, CLMUL, and F16CN/A
MOVBEN/A
AVIC, BMI2 and RDRANDN/A
ADX, SHA, RDSEED, SMAP, SMEP, XSAVEC, XSAVES, XRSTORS, CLFLUSHOPT, and CLZERON/AN/A
WBNOINVD, CLWB, RDPID, RDPRU, and MCOMMITN/AN/A
FPUs per core10.5110.51
Pipes per FPU22
FPU pipe width128-bit256-bit80-bit128-bit
CPU instruction set SIMD levelSSE4a[lower-alpha 5]AVXAVX2SSSE3AVXAVX2
3DNow!3DNow!+N/AN/A
PREFETCH/PREFETCHW
FMA4, LWP, TBM, and XOPN/AN/AN/AN/A
FMA3
L1 data cache per core (KiB)64163232
L1 data cache associativity (ways)2488
L1 instruction caches per core10.5110.51
Max APU total L1 instruction cache (KiB)2561281922565126412896128
L1 instruction cache associativity (ways)2348234
L2 caches per core10.5110.51
Max APU total L2 cache (MiB)424121
L2 cache associativity (ways)168168
APU total L3 cache (MiB)N/A48N/A4
APU L3 cache associativity (ways)1616
L3 cache schemeVictimN/AVictimVictim
Max stock DRAM supportDDR3-1866DDR3-2133DDR3-2133, DDR4-2400DDR4-2400DDR4-2933DDR4-3200, LPDDR4-4266DDR3L-1333DDR3L-1600DDR3L-1866DDR3-1866, DDR4-2400DDR4-2400
Max DRAM channels per APU212
Max stock DRAM bandwidth (GB/s) per APU29.86634.13238.40046.93268.25610.66612.80014.93319.20038.400
GPU microarchitectureTeraScale 2 (VLIW5)TeraScale 3 (VLIW4)GCN 2nd genGCN 3rd genGCN 5th gen[22]TeraScale 2 (VLIW5)GCN 2nd genGCN 3rd gen[22]GCN 5th gen
GPU instruction setTeraScale instruction setGCN instruction setTeraScale instruction setGCN instruction set
Max stock GPU base clock (MHz)6008008448661108125014002100538600?8479001200
Max stock GPU base GFLOPS[lower-alpha 6]480614.4648.1886.71134.517601971.22150.486???345.6460.8
3D engine[lower-alpha 7]Up to 400:20:8Up to 384:24:6Up to 512:32:8Up to 704:44:16[23]Up to 512:?:?80:8:4128:8:4Up to 192:?:?Up to 192:?:?
IOMMUv1IOMMUv2IOMMUv1?IOMMUv2
Video decoderUVD 3.0UVD 4.2UVD 6.0VCN 1.0[24]UVD 3.0UVD 4.0UVD 4.2UVD 6.0UVD 6.3VCN 1.0
Video encoderN/AVCE 1.0VCE 2.0VCE 3.1N/AVCE 2.0VCE 3.1
GPU power savingPowerPlayPowerTunePowerPlayPowerTune[25]
TrueAudioN/A[26]N/A
FreeSync1
2		1
2
HDCP[lower-alpha 8]?1.41.4
2.2		?1.41.4
2.2
PlayReady[lower-alpha 8]N/A3.0 not yetN/A3.0 not yet
Supported displays[lower-alpha 9]2–32–433 (desktop)
4 (mobile, embedded)		4234
/drm/radeon[lower-alpha 10][28][29]N/AN/A
/drm/amdgpu[lower-alpha 10][30]N/A[31]N/A[31]
  1. APU models: A8-7680, A6-7480. CPU only: Athlon X4 845.
  2. A PC would be one node.
  3. An APU combines a CPU and a GPU. Both have cores.
  4. Requires firmware support.
  5. No SSE4. No SSSE3.
  6. Single-precision performance is calculated from the base (or boost) core clock speed based on a FMA operation.
  7. Unified shaders : texture mapping units : render output units
  8. To play protected video content, it also requires card, operating system, driver, and application support. A compatible HDCP display is also needed for this. HDCP is mandatory for the output of certain audio formats, placing additional constraints on the multimedia setup.
  9. To feed more than two displays, the additional panels must have native DisplayPort support.[27] Alternatively active DisplayPort-to-DVI/HDMI/VGA adapters can be employed.
  10. DRM (Direct Rendering Manager) is a component of the Linux kernel. Support in this table refers to the most current version.

APU-branded platforms

AMD APUs have a unique architecture: they have AMD CPU modules, cache, and a discrete-class graphics processor, all on the same die using the same bus. This architecture allows for the use of graphics accelerators, such as OpenCL, with the integrated graphics processor.[32] The goal is to create a "fully integrated" APU, which, according to AMD, will eventually feature 'heterogeneous cores' capable of processing both CPU and GPU work automatically, depending on the workload requirement.[33]

TeraScale-based GPU

K10 architecture (2011): Llano
AMD A6-3650 (Llano)
Main article: AMD 10h

The first generation APU, released in June 2011, was used in both desktops and laptops. It was based on the K10 architecture and built on a 32 nm process featuring two to four CPU cores on a thermal design power (TDP) of 65-100 W, and integrated graphics based on the Radeon HD6000 Series with support for DirectX 11, OpenGL 4.2 and OpenCL 1.2. In performance comparisons against the similarly priced Intel Core i3-2105, the Llano APU was criticised for its poor CPU performance[36] and praised for its better GPU performance.[37][38] AMD was later criticised for abandoning Socket FM1 after one generation.[39]

Bobcat architecture (2011): Ontario, Zacate, Desna, Hondo
Main article: Bobcat (microarchitecture)

The AMD Brazos platform was introduced on 4 January 2011, targeting the subnotebook, netbook and low power small form factor markets.[3] It features the 9-watt AMD C-Series APU (codename: Ontario) for netbooks and low power devices as well as the 18-watt AMD E-Series APU (codename: Zacate) for mainstream and value notebooks, all-in-ones and small form factor desktops. Both APUs feature one or two Bobcat x86 cores and a Radeon Evergreen Series GPU with full DirectX11, DirectCompute and OpenCL support including UVD3 video acceleration for HD video including 1080p.[3]

AMD expanded the Brazos platform on 5 June 2011 with the announcement of the 5.9-watt AMD Z-Series APU (codename: Desna) designed for the Tablet market.[40] The Desna APU is based on the 9-watt Ontario APU. Energy savings were achieved by lowering the CPU, GPU and northbridge voltages, reducing the idle clocks of the CPU and GPU as well as introducing a hardware thermal control mode.[40] A bidirectional turbo core mode was also introduced.

AMD announced the Brazos-T platform on 9 October 2012. It comprised the 4.5-watt AMD Z-Series APU (codenamed Hondo) and the A55T Fusion Controller Hub (FCH), designed for the tablet computer market.[41][42] The Hondo APU is a redesign of the Desna APU. AMD lowered energy use by optimizing the APU and FCH for tablet computers.[43][44]

The Deccan platform including Krishna and Wichita APUs were cancelled in 2011. AMD had originally planned to release them in the second half 2012.[45]

Piledriver architecture (2012): Trinity and Richland
AMD A4-5300 (Trinity)
Main article: Piledriver (microarchitecture)
  • Piledriver-based CPU
  • Northern Islands/VLIW4-based GPU (branded Radeon HD 7000 and 8000 Series)
  • Unified Northbridge – includes AMD Turbo Core 3.0, which enables automatic bidirectional power management between CPU modules and GPU. Power to the CPU and GPU is controlled automatically by changing the clock rate depending on the load. For example, for a non-overclocked A10-5800K APU the CPU frequency can change from 1.4 GHz to 4.2 GHz, and the GPU frequency can change from 304 MHz to 800 MHz. In addition, CC6 mode is capable of powering down individual CPU cores, while PC6 mode is able to lower the power on the entire rail.[46]
  • AMD HD Media Accelerator[47] – includes AMD Perfect Picture HD, AMD Quick Stream technology, and AMD Steady Video technology.
  • Display controllers: AMD Eyefinity-support for multi-monitor set-ups, HDMI, DisplayPort 1.2, DVI
Trinity

The first iteration of the second generation platform, released in October 2012, brought improvements to CPU and GPU performance to both desktops and laptops. The platform features 2 to 4 Piledriver CPU cores built on a 32 nm process with a TDP between 65 W and 100 W, and a GPU based on the Radeon HD7000 Series with support for DirectX 11, OpenGL 4.2, and OpenCL 1.2. The Trinity APU was praised for the improvements to CPU performance compared to the Llano APU.[48]

Richland
  • "Enhanced Piledriver" CPU cores[49]
  • Temperature Smart Turbo Core technology. An advancement of the existing Turbo Core technology, which allows internal software to adjust the CPU and GPU clock speed to maximise performance within the constraints of the Thermal design power of the APU.[50]
  • New low-power consumption CPUs with only 45 W TDP[51]

The release of this second iteration of this generation was 12 March 2013 for mobile parts and 5 June 2013 for desktop parts.

Graphics Core Next-based GPU

Jaguar architecture (2013): Kabini and Temash
Main article: Jaguar (microarchitecture)

In January 2013 the Jaguar-based Kabini and Temash APUs were unveiled as the successors of the Bobcat-based Ontario, Zacate and Hondo APUs.[52][53][54] The Kabini APU is aimed at the low-power, subnotebook, netbook, ultra-thin and small form factor markets, while the Temash APU is aimed at the tablet, ultra-low power and small form factor markets.[54] The two to four Jaguar cores of the Kabini and Temash APUs feature numerous architectural improvements regarding power requirement and performance, such as support for newer x86-instructions, a higher IPC count, a CC6 power state mode and clock gating.[55][56][57] Kabini and Temash are AMD's first, and also the first ever quad-core x86 based SoCs.[58] The integrated Fusion Controller Hubs (FCH) for Kabini and Temash are codenamed "Yangtze" and "Salton", respectively.[59] The Yangtze FCH features support for two USB 3.0 ports, two SATA 6 Gbit/s ports, as well as the xHCI 1.0 and SD/SDIO 3.0 protocols for SD-card support.[59] Both chips feature DirectX 11.1-compliant GCN-based graphics as well as numerous HSA improvements.[52][53] They were fabricated at a 28 nm process in an FT3 ball grid array package by Taiwan Semiconductor Manufacturing Company (TSMC), and were released on 23 May 2013.[55][60][61]

The PlayStation 4 and Xbox One were revealed to both be powered by 8-core semi-custom Jaguar-derived APUs.

Steamroller architecture (2014): Kaveri
AMD A8-7650K (Kaveri)
Main article: Steamroller (microarchitecture)

The third generation of the platform, codenamed Kaveri, was partly released on 14 January 2014.[64] Kaveri contains up to four Steamroller CPU cores clocked to 3.9 GHz with a turbo mode of 4.1 GHz, up to a 512-core Graphics Core Next GPU, two decode units per module instead of one (which allows each core to decode four instructions per cycle instead of two), AMD TrueAudio,[65] Mantle API,[66] an on-chip ARM Cortex-A5 MPCore,[67] and will release with a new socket, FM2+.[68] Ian Cutress and Rahul Garg of Anandtech asserted that Kaveri represented the unified system-on-a-chip realization of AMD's acquisition of ATI. The performance of the 45 W A8-7600 Kaveri APU was found to be similar to that of the 100 W Richland part, leading to the claim that AMD made significant improvements in on-die graphics performance per watt;[62] however, CPU performance was found to lag behind similarly-specified Intel processors, a lag that was unlikely to be resolved in the Bulldozer family APUs.[62] The A8-7600 component was delayed from a Q1 launch to an H1 launch because the Steamroller architecture components allegedly did not scale well at higher clock speeds.[69]

AMD announced the release of the Kaveri APU for the mobile market on 4 June 2014 at Computex 2014,[63] shortly after the accidental announcement on the AMD website on 26 May 2014.[70] The announcement included components targeted at the standard voltage, low-voltage, and ultra-low voltage segments of the market. In early-access performance testing of a Kaveri prototype laptop, AnandTech found that the 35 W FX-7600P was competitive with the similarly-priced 17 W Intel i7-4500U in synthetic CPU-focused benchmarks, and was significantly better than previous integrated GPU systems on GPU-focused benchmarks.[71] Tom's Hardware reported the performance of the Kaveri FX-7600P against the 35 W Intel i7-4702MQ, finding that the i7-4702MQ was significantly better than the FX-7600P in synthetic CPU-focused benchmarks, whereas the FX-7600P was significantly better than the i7-4702MQ's Intel HD 4600 iGPU in the four games that could be tested in the time available to the team.[63]

Puma architecture (2014): Beema and Mullins
Main article: Puma (microarchitecture)

Puma+ architecture (2015): Carrizo-L
Main article: Puma (microarchitecture) § Puma+

Excavator architecture (2015): Carrizo
Main article: Excavator (microarchitecture)

Steamroller architecture (Q2–Q3 2015): Godavari
Main article: Steamroller (microarchitecture)
  • Update of the desktop Kaveri series with higher clock frequencies or smaller power envelope
  • Steamroller-based CPU with 4 cores[75]
  • Graphics Core Next 2nd Gen-based GPU
  • Memory controller supports DDR3 SDRAM at 2133 MHz
  • 95 W TDP
  • Socket FM2+
  • Target segment desktop
  • Listed since Q2 2015

Excavator architecture (2016): Bristol Ridge and Stoney Ridge
AMD A12-9800 (Bristol Ridge)
Main article: Excavator (microarchitecture)
  • Excavator-based CPU with 2–4 cores
  • 1 MB L2 cache per module
  • Graphics Core Next 3rd Gen-based GPU[76][77][78][79]
  • Memory controller supports DDR4 SDRAM
  • 15/35/45/65 W TDP with support for configurable TDP
  • 28 nm
  • Socket AM4 for desktop
  • Target segment desktop, mobile and ultra-mobile

Zen architecture (2017): Raven Ridge
Main articles: Zen (microarchitecture) and Ryzen § APUs: Raven Ridge

Zen+ architecture (2019): Picasso
Main articles: Zen+ and Ryzen § APUs: Picasso
  • Zen+-based CPU microarchitecture[84]
  • Refresh of Raven Ridge on 12 nm with improved latency and efficiency/clock frequency. Features identical to Raven Ridge
  • Launched January 2019

Zen 2 architecture (2020): Renoir
Main articles: Zen 2 and Renoir APUs
gollark: ABR is written using Discord.py nowadays.
gollark: I see. Can ABR be added to this? I must harvest souls.
gollark: *Where* does it have 40000 people from?
gollark: I suppose they are relatively speaking.
gollark: Microscale apiospace portals, *technically*. It's definitely safe, I checked.

See also

References
  1. "The rise and fall of AMD: A company on the ropes". 23 April 2013. Retrieved 20 December 2013.
  2. William Van Winkle (13 August 2012). "AMD Fusion: How It Started, Where It's Going, And What It Means". Retrieved 20 December 2013.
  3. AMD (4 January 2011). "AMD Fusion APU Era Begins". Retrieved 24 August 2013.
  4. Stokes, Jon (8 February 2010). "AMD reveals Fusion CPU+GPU, to challenge Intel in laptops". Ars Technica. Archived from the original on 10 February 2010. Retrieved 9 February 2010.
  5. Kowaliski, Cyril. "A closer look at AMD's Brazos platform". The Tech Report. Retrieved 15 June 2017.
  6. "AMD ditches Fusion branding". Bit-tech. Retrieved 24 July 2013.
  7. "AMD targeted by Arctic over Fusion brand". Bit-tech. Retrieved 24 July 2013.
  8. Cyril Kowaliski (9 November 2010). "AMD begins shipping Brazos, announces Bulldozer-based APUs". The Tech Report. Retrieved 7 January 2014.
  9. Rick Bergman (9 November 2010). "AMD 2010 Financial Analyst Day". Advanced Micro Devices, Inc. Archived from the original (PDF) on 18 January 2016. Retrieved 7 January 2014.
  10. "AMD reveals its 2012-2013 roadmap, promises 28 nm chips across the board by 2013". Engadget. 2 February 2012. Retrieved 22 August 2012.
  11. Kingsley-Hughes, Adrian. "Building an AMD 'Trinity' desktop PC - ZDNet".
  12. AMD launches "Richland" A-Series APUs: slight speed bump, better power management 404 Archived 2013-07-19 at the Wayback Machine
  13. Taylor, John (21 February 2013). "AMD and The Sony PS4. Allow Me To Elaborate". Archived from the original on 26 May 2013. Retrieved 30 August 2013.
  14. "XBox One Revealed". Wired. 21 May 2013. Retrieved 23 May 2013.
  15. Darren Murph. "AMD announces Temash, Kabini, Richland, and Kaveri APUs at CES 2013 (video)". Retrieved 20 December 2013.
  16. Ridley, Jacob (15 November 2017). "AMD Raven Ridge - Ryzen Mobile release date, specs, and performance". Retrieved 30 November 2017.
  17. "The programmer's guide to the APU galaxy" (PDF).
  18. "AMD Outlines HSA Roadmap: Unified Memory for CPU/GPU in 2013, HSA GPUs in 2014".
  19. "AMD Announces the 7th Generation APU: Excavator mk2 in Bristol Ridge and Stoney Ridge for Notebooks". 31 May 2016. Retrieved 3 January 2020.
  20. "AMD Mobile "Carrizo" Family of APUs Designed to Deliver Significant Leap in Performance, Energy Efficiency in 2015" (Press release). 20 November 2014. Retrieved 16 February 2015.
  21. "The Mobile CPU Comparison Guide Rev. 13.0 Page 5 : AMD Mobile CPU Full List". TechARP.com. Retrieved 13 December 2017.
  22. "AMD VEGA10 and VEGA11 GPUs spotted in OpenCL driver". VideoCardz.com. Retrieved 6 June 2017.
  23. Cutress, Ian (1 February 2018). "Zen Cores and Vega: Ryzen APUs for AM4 – AMD Tech Day at CES: 2018 Roadmap Revealed, with Ryzen APUs, Zen+ on 12nm, Vega on 7nm". Anandtech. Retrieved 7 February 2018.
  24. Larabel, Michael (17 November 2017). "Radeon VCN Encode Support Lands in Mesa 17.4 Git". Phoronix. Retrieved 20 November 2017.
  25. Tony Chen; Jason Greaves, "AMD's Graphics Core Next (GCN) Architecture" (PDF), AMD, retrieved 13 August 2016
  26. "A technical look at AMD's Kaveri architecture". Semi Accurate. Retrieved 6 July 2014.
  27. "How do I connect three or More Monitors to an AMD Radeon™ HD 5000, HD 6000, and HD 7000 Series Graphics Card?". AMD. Retrieved 8 December 2014.
  28. Airlie, David (26 November 2009). "DisplayPort supported by KMS driver mainlined into Linux kernel 2.6.33". Retrieved 16 January 2016.
  29. "Radeon feature matrix". freedesktop.org. Retrieved 10 January 2016.
  30. Deucher, Alexander (16 September 2015). "XDC2015: AMDGPU" (PDF). Retrieved 16 January 2016.
  31. Michel Dänzer (17 November 2016). "[ANNOUNCE] xf86-video-amdgpu 1.2.0". lists.x.org.
  32. APU101_Final_Jan 2011.pdf
  33. Shimpi, Anand Lal. "AMD Outlines HSA Roadmap: Unified Memory for CPU/GPU in 2013, HSA GPUs in 2014". AnandTech.
  34. "AMD Llano core". Cpu-world.com. 17 March 2014. Retrieved 24 March 2014.
  35. "AMD Fusion Architecture and Llano".
  36. Anand Lal Shimpi (30 June 2011). "The AMD A8-3850 Review: Llano on the Desktop". Anandtech. Retrieved 12 January 2014.
  37. "Conclusion - AMD A8-3850 Review: Llano Rocks Entry-Level Desktops". 30 June 2011.
  38. Shimpi, Anand Lal. "The AMD A8-3850 Review: Llano on the Desktop". AnandTech.
  39. Shimpi, Anand Lal. "AMD A10-5800K & A8-5600K Review: Trinity on the Desktop, Part 1". AnandTech.
  40. Nita, Sorin (1 June 2011). "AMD Releases More Details Regarding the Desna Tablet APU". Retrieved 20 March 2013.
  41. AMD (9 October 2013). "New AMD Z-Series APU for Tablets Enables Immersive Experience for Upcoming Microsoft Windows 8 Platforms". Retrieved 20 March 2013.
  42. Shvets, Anthony (10 October 2012). "AMD announces Z-60 APU for tablets".
  43. Hruska, Joel (9 October 2012). "AMD's Hondo Z-Series APU To Challenge Intel's Atom In Windows 8 Tablet Market". Retrieved 20 March 2013.
  44. Shilov, Anton (9 October 2012). "AMD Introduces Its First Accelerated Processing Unit for Media Tablets". Archived from the original on 9 February 2013. Retrieved 20 March 2013.
  45. Demerjian, Charlie. "Exclusive: AMD kills Wichita and Krishna". SemiAccurate. Retrieved 22 August 2012.
  46. "CPU + GPU = APU: East Meets West". Retrieved 1 September 2013.
  47. "AMD's 2nd Generation APU, Codenamed "Trinity," Will Enable Superior Multimedia Experience for Our "Connected" Generation". Archived from the original on 7 April 2013.
  48. Shimpi, Anand Lal. "The AMD A8-3850 Review: Llano on the Desktop". AnandTech.
  49. "AMD Officially Announces Third Generation Richland A-Series Mobile APUs - 50% Faster GPU Than Intel Core i7 Mobile". 12 March 2013.
  50. "New Details Revealed on AMD's Upcoming Richland Chips". 12 March 2013.
  51. "AMD A10-Series A10-6700T — AD670TYHA44HL / AD670TYHHLBOX". Cpu-world.com. Retrieved 10 November 2013.
  52. SKYMTL (9 January 2013). "Richland, Kaveri, Kabini & Temash; AMD's 2013 APU Lineup Examined". Hardwarecanucks. Retrieved 23 March 2013.
  53. Halfacree, Gareth (8 January 2013). "AMD unveils new APUs, SoCs and Radeon HD 8000 Series". Bit-Tech. Retrieved 23 March 2013.
  54. Lal Shimpi, Anand (2 February 2012). "AMD's 2012 - 2013 Client CPU/GPU/APU Roadmap Revealed". AnandTech. Retrieved 8 August 2012.
  55. Shilov, Anton (2 January 2013). "AMD to Officially Roll-Out "Kabini" and "Temash" Low-Power APUs This Quarter". X-bit labs. Archived from the original on 17 January 2013. Retrieved 21 March 2013.
  56. Shilov, Anton (24 July 2013). "AMD's New Low-Power Micro-Architecture to Support AVX, BMI Other New Instructions". X-bit labs. Archived from the original on 9 February 2013. Retrieved 21 March 2013.
  57. Paul, Donald (21 October 2012). "Leaked details of the future some Kabini APU AMD". Technewspedia. Retrieved 21 March 2013.
  58. Paine, Steve Chippy (9 January 2013). "AMD Shares SoC Line-Up for 2013. Kabini is for Ultrathins". Ultrabooknews. Retrieved 21 March 2013.
  59. Abazovic, Fuad (24 January 2013). "Kabini chipset is Yangtze". Fudzilla. Retrieved 21 March 2013.
  60. Hruska, Paul (14 January 2013). "AMD quietly confirms 28 nm Kabini, Temash chips are being built at TSMC". Extremetech. Retrieved 21 March 2013.
  61. "AMDs sparsame Mobilprozessoren Kabini und Temash legen los". 23 May 2013. Retrieved 31 August 2013.
  62. "AMD Kaveri Review: A8-7600 and A10-7850K Tested". Anandtech. Retrieved 20 May 2014.
  63. "AMD FX-7600P Kaveri Review: FX Rides Again...In A Mobile APU?". Tom's Hardware. Retrieved 8 June 2014.
  64. "AnandTech Portal | AMD Kaveri APU Launch Details: Desktop, January 14th". Anandtech.com. Retrieved 13 January 2014.
  65. ChrisFiebelkorn on 3 Dec 2013. "AMD A10 Kaveri APU Details Leaked". HotHardware. Retrieved 13 January 2014.
  66. Dave_HH on 14 Nov 2013. "How AMD's Mantle Will Redefine Gaming, AMD Hardware Not Required". HotHardware. Retrieved 13 January 2014.
  67. "AMD and ARM Fusion redefine beyond x86". Archived from the original on 5 November 2013. Retrieved 20 July 2012.
  68. "AMD's Next-Gen "Kaveri" APUs Will Require New Mainboards - X-bit labs".
  69. "Perils of a paper launch: AMD's A8-7600 pushed back to late 2014". Extreme Tech. Retrieved 20 May 2014.
  70. "AMD Publishes Mobile Kaveri Specifications". Anandtech. Retrieved 29 May 2014.
  71. "AMD Launches Mobile Kaveri APUs". AnandTech. Retrieved 8 June 2014.
  72. "AMD's Carrizo-L APUs Unveiled: 12-25W Quad Core Puma+". AnandTech. Retrieved 1 September 2015.
  73. "AMD Details Carrizo APUs Energy Efficient Design at Hot Chips 2015 – 28nm Bulk High Density Design With 3.1 Billion Transistors, 250mm2 Die". WCCFTech. Retrieved 1 September 2015.
  74. "Preview AMD's next gen APU (Carrizo)".
  75. "PC gaming hardware - PC Gamer".
  76. Shilov, Anton. "AMD preps 'Bristol Ridge' APUs: 'Carrizo' for desktops". KitGuru. Retrieved 5 April 2016.
  77. Cutress, Ian (5 April 2016). "AMD Pre-Announces Bristol Ridge in Notebooks: The 7th Generation APU". AnandTech.com. AnandTech.com. Retrieved 5 April 2016.
  78. Kampman, Jeff (5 April 2016). "AMD lifts the curtain a little bit on its Bristol Ridge APUs". TechReport.com. Retrieved 5 April 2016.
  79. Cutress, Ian (1 June 2016). "AMD Announces 7th Generation APU". Anandtech.com. Retrieved 1 June 2016.
  80. Larabel, Michael (13 December 2016). "AMD Reveals More Zen CPU Details, Officially Known As Ryzen, No Linux Details Yet". Phoronix. Retrieved 13 December 2016.
  81. Hallock, Robert (27 November 2017). "Understanding Precision Boost 2 in AMD SenseMI technology". AMD. Retrieved 19 December 2019.
  82. Ferreira, Bruno (16 May 2017). "Ryzen Mobile APUs are coming to a laptop near you". Tech Report. Retrieved 16 May 2017.
  83. Mujtaba, Hassan (18 December 2019). "AMD Ryzen 4000 APU Lineup For Desktop & Mobility Platforms Leaked". Wccftech. Retrieved 19 December 2019.
  84. Cutress, Ian (6 January 2019). "AMD at CES 2019: Ryzen Mobile 3000-Series Launched, 2nd Gen Mobile at 15W and 35W, and Chromebooks". anandtech.com. AnandTech. Retrieved 12 November 2019.
  85. btarunr (3 September 2019). "AMD "Renoir" APU to Support LPDDR4X Memory and New Display Engine". TechPowerUp. Retrieved 19 December 2019.
  86. Pirzada, Usman (11 November 2019). "AMD Renoir APU Launching CES 2020, Will Destroy The NVIDIA MX 250 And Iris Pro Graphics". Wccftech. Retrieved 19 December 2019.
This article is issued from Wikipedia. The text is licensed under Creative Commons - Attribution - Sharealike. Additional terms may apply for the media files.