Xili Lake station

Xili Lake station (Chinese: 西丽湖站; pinyin: Xī Lì Hú Zhàn) is a Metro station of Shenzhen Metro Line 7. It opened on 28 October 2016.

Xili Lake

西丽湖
LocationNanshan District, Shenzhen, Guangdong
China
Operated bySZMC (Shenzhen Metro Group)
Line(s)     Line 7
History
Opened28 October 2016
Services
Preceding station Shenzhen Metro Following station
Terminus Line 7 Xili
towards Tai'an
Concourse

Station layout

G - Exit
B1F
Concourse
Lobby Customer Service, Shops, Vending machines, ATMs
B2F
Platforms
Platform 1      Line 7 termination platform
Island platform, doors will open on the left
Platform 2      Line 7 towards Tai'an (Xili)

Exits

Exit Destination
Exit A Lishui Road (N)
Exit B Xili Road, Shenzhen Safari Park, Xilihu Holiday Resort, Lihu Garden, Xili Villa, Zijing Villa, Pingli Garden, Deyi Mingju
Exit C Lishan Road, Xihu Linyu, Xuecheng Lvyuan, Guigu Apartment, Sangtaidan Huayuan
Exit D Lishui Road (S), Xihu Linyu, Xuecheng Lüyuan, Shenzhen Graduate School of Tsinghua University, University Town of Shenzhen (North Campus)
gollark: ++exec```haskelldata Would = Seriously Why Inttype Mad = ()data Are = Are Madtype Is = Aredata You = You Are Maddata Thing = This Thing Is Maddata This = Thing Madtype Do = Thing -> You -> [Thing]data Why = Why Would You Do Thiswhy :: Whywhy = Why would you do this where would = Would why 0 you = You (Are ()) () do = \_ _ -> [] this = Thing ()```
gollark: ```haskelldata Would = Seriously Why Inttype Mad = ()data Are = Are Madtype Is = Aredata You = You Are Maddata Thing = This Thing Is Maddata This = Thing Maddata Do = Thing -> You -> [Thing]data Why = Why Would You Do This```
gollark: ```assemblyHASKELLmain = putStr "hi!"```
gollark: Assembly makes it so hard to implement linked lists with referential transparency!
gollark: I prefer Haskell to Assembly.

References


    This article is issued from Wikipedia. The text is licensed under Creative Commons - Attribution - Sharealike. Additional terms may apply for the media files.