Tiger Lake (microprocessor)
Tiger Lake is Intel's codename for the 11th generation Intel Core mobile processors based on the new Willow Cove Core microarchitecture, to be manufactured using Intel's third-generation 10 nm process node (named "10nm SuperFin"). Intel announced on August 5, 2020 that it would launch Tiger Lake on September 2, 2020 via webcast.[1] It is expected that Tiger Lake will replace the Ice Lake family of mobile processors,[2] representing an Optimization step in Intel's Process-Architecture-Optimization model.
Cache | |
---|---|
L1 cache | 80 KiB per core (32 instructions + 48 data) |
L2 cache | 1.25 MiB per core |
L3 cache | Up to 12 MiB, shared |
Architecture and classification | |
Architecture | x86-64 |
Instructions | x86-64 |
Extensions | |
Physical specifications | |
Transistors |
|
GPU(s) | Intel Xe |
History | |
Predecessor | Ice Lake |
Successor | Alder Lake |
Tiger Lake will include quad-core 9 W TDP and 28 W TDP models.[3] It will power some 2020 "Project Athena" laptops.[4][5][6] The quad-core 96 EU die measures 13.6 by 10.7 mm (146.1 mm2), which is 19.2% wider than the 11.4 by 10.7 mm (122.5 mm2) quad-core 64 EU Ice Lake die.[7]
Features
- Intel Willow Cove CPU cores
- Intel Xe ("Gen12") GPU with up to 96 execution units[8] with some processors using Intel's discrete GPU, DG1[9]
- HEVC 12-bit, 4:2:2 & 4:4:4 fixed-function hardware decoding & VP9 12-bit 4:4:4 fixed-function hardware decoding & AV1 10-bit 4:2:0 fixed-function hardware decoding[10][11]
- PCI Express 4.0[12]
- Thunderbolt 4
- USB4
- LPDDR5 memory [13]
- New Deep Learning Boost (DL Boost) extensions for built-in AI training acceleration in Xeon processors[14]
- A new AVX-512 instruction: Vector Pair Intersection to a Pair of Mask Registers (VP2INTERSECT).[15]
- Miniaturization of CPU and motherboard into an M.2 SSD-sized small circuit board[9]
- Indirect branch tracking and shadow stack[16]
See also
- Process-Architecture-Optimization model
References
- "Intel Schedules Tiger Lake Architecture Presentation For August 13th, Launch on September 2nd". Anandtech. 5 August 2020.
- Intel teases its Ice Lake & Tiger Lake family, 10nm for 2018 and 2019
- "2019 Intel Investor Meeting: The Transformation of the PC Sector" (PDF). 2019 Intel Investor Meeting. May 8, 2019. p. 11. Retrieved 2019-05-19.
- "Intel roadmap confirms 10nm 'Tiger Lake' chip with Xe graphics, more Ice Lake and Lakefield details". PCWorld. 2019-05-09. Retrieved 2019-05-19.
- "Project Athena: An Innovation Program". Intel Newsroom.
- "How Intel's Project Athena is powering the future of Chromebooks". Chrome Unboxed - The Latest Chrome OS News. Jan 16, 2020.
- Cutress, Dr Ian. "I Ran Off with Intel's Tiger Lake Wafer. Who Wants a Die Shot?". www.anandtech.com. Retrieved 2020-01-14.
- Compute Performance of Intel® Genuine Intel® CPU 0000 with Graphics gfx-driver-user-master-28576 ReleaseInternal
- Intel's Tiger Lake Laptop CPU Brings Thunderbolt 4, AI Graphics Processing
- https://github.com/intel/media-driver/blob/master/README.md#decodingencoding-features
- "[Decode] This enables HW AV1 decode acceleration on Gen12 · intel/media-driver@9491998". GitHub. Retrieved 2020-07-29.
- Intel "Tiger Lake" Supports PCIe Gen 4 and Features Xe Graphics, Phantom Canyon NUC Detailed
- Intel Tiger Lake-Y 10nm CPU Makes Early Benchmark Debut With Gen12 Xe Graphics
- Intel makes a splash at CES with AI, autonomous driving tech and Tiger Lake chips
- "Compiler Support Getting Wired Up For AVX-512 VP2INTERSECT - Phoronix". www.phoronix.com. Retrieved 2020-01-14.
- Catalin Cimpanu (15 June 2020). "Intel brings novel CET technology to Tiger Lake mobile CPUs". ZDNet.