MBus (SPARC)

MBus is a computer bus designed and implemented by Sun Microsystems for communication between high speed computer system components, such as the central processing unit, motherboard and main memory. Contrast this with SBus, used in the same machines to connect add-on cards to the motherboard.

MBus module, Sun SuperSPARC II SM71
Two MBus connectors (top of photograph), one occupied by CPU module

MBus was first used in Sun's first multiprocessor SPARC-based system, the SPARCserver 600MP series (launched in 1991), and later found use in the SPARCstation 10 and SPARCstation 20 workstations. The bus permitted the integration of several microprocessors on a single motherboard, in a multiprocessing configuration with up to eight CPUs packaged in detachable MBus modules. However, in practice, the number of processors per MBus was limited to four. Single processor systems were also sold that used the MBus protocol internally, but with the CPUs permanently attached to the motherboard to lower manufacturing costs.

MBus specified a 64-bit datapath, which used 36-bit physical addressing, giving an address space of 64 GB. The transfer rate is 80 MB/s sustained (320 MB/s peak) at 40 MHz, or 100 MB/s (400 MB/s peak) at 50 MHz. Bus controlling is done by an arbiter. Interrupt, reset, and timeout logic are also specified.

Several related buses were also developed:

XBus

XBus is a packet-switched bus used in the SPARCserver 1000, SPARCcenter 2000 and Cray CS6400. This corresponded to the circuit-switched MBus, with identical electrical characteristics and physical form factor but an incompatible signalling protocol.

KBus

KBus is a high-speed interconnection system for linking multiple MBuses, used in Solbourne Series 6 and Series 7 computer systems.

History

The MBus standard was cooperatively developed by Sun and Ross Technology and released in 1991.[1]

Manufacturers who produced computer systems using the MBus included Sun, Ross Technology, Inc., Hyundai/Axil, Fujitsu, Solbourne Computer, Tatung, GCS, Auspex, ITRI, ICL, Cray, Amdahl, Themis, DTK and Kamstrup.

gollark: Wrong.
gollark: No allegations of our alleged "time crimes" have allegedly been backed up by substantial evidence.
gollark: (on 6000 384-entry vectors, so actually this isn't very impressive)
gollark: I have a very fast but somewhat RAM-hungry implementation, and one which uses SQLite and makes it a (very badly optimized) user-defined function, and somehow the SQLite one takes less than a second to do anything.
gollark: I'm continuing with Project HOLISTIC OVERHANGS, which is the minoteaur semantic search functionality, and I'm basically just ranking a moderately sized set of vectors by cosine similarity to a query.

See also
  • List of device bandwidths

References
  1. "HyperSPARC goes Hollywood; Pixar uses HyperSPARC microprocessors from Ross Technology to create final rendering of 'Toy Story'".
MBus male connector
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