Jagjivanrao Pant Pratinidhi

Jagjivan Rao Pant Pratinidhi (also known as Dadoba)[2] served as Pratinidhi (Chief Delegate) during Chhatrapati Shahu I reign. He is the younger brother of Shripatrao Pant Pratinidhi.He succeeded as Pratinidhi after the death of his brother in 1691 at the age of fifty-five. [3]

Jagjivanrao Pant Pratinidhi
Pratinidhi to the Emperor Shahu of

Maratha Empire

3rd Chief of Aundh
Reign1746-1749
Coronation1746
PredecessorShripatrao Pant Pratinidhi
SuccessorShrinivasrao Gangadhar[1]
Born1691
Aundh, Satara
(Satara District, Maharashtra)
Died1754
Aundh, Satara
(Satara District, Maharashtra)
FatherParshuram Pant Pratinidhi

Early life

Jagjivan Rao, was born in 1691 to Parshuram Pant Pratinidhi. He is the fourth son of Parshuram Pant Pratinidhi[4]

gollark: All numbers are two's complement because bee you.
gollark: The rest of the instruction consists of variable-width (for fun) target specifiers. The first N target specifiers in an operation are used as destinations and the remaining ones as sources. N varies per opcode. They can be of the form `000DDD` (pop/push from/to stack index DDD), `001EEE` (peek stack index EEE if source, if destination then push onto EEE if it is empty), `010FFFFFFFF` (8-bit immediate value FFFFFFFF; writes are discarded), `011GGGGGGGGGGGGGGGG` (16-bit immediate value GGGGGGGGGGGGGGGG; writes are also discarded), `100[H 31 times]` (31-bit immediate because bee you), `101IIIIIIIIIIIIIIII` (16 bits of memory location relative to the base memory address register of the stack the operation is conditional on), `110JJJJJJJJJJJJJJJJ` (16 bit memory location relative to the top value on that stack instead), `1111LLLMMM` (memory address equal to base memory address of stack LLL plus top of stack MMM), or `1110NNN` (base memory address register of stack MMM).Opcodes (numbered from 0 in order): MOV (1 source, as many destinations as can be parsed validly; the value is copied to all of them), ADD (1 destination, multiple sources), JMP (1 source), NOT (same as MOV), WR (write to output port; multiple sources, first is port number), RE (read from input port; one source for port number, multiple destinations), SUB, AND, OR, XOR, SHR, SHL (bitwise operations), MUL, ROR, ROL, NOP, MUL2 (multiplication with two outputs).
gollark: osmarksISA™️-2028 is a VLIW stack machine. Specifically, it executes a 384-bit instruction composed of 8 48-bit operations in parallel. There are 8 stacks, for safety. Each stack also has an associated base memory address register, which is used in some "addressing modes". Each stack holds 64-bit integers; popping/peeking an empty stack simply returns 0, and the stacks can hold at most 32 items. Exceeding a stack's capacity is runtime undefined behaviour. The operation encoding is: `AABBBCCCCCCCCC`:A = 2-bit conditional operation mode - 0 is "run unconditionally", 1 is "run if top value on stack is 0", 2 is "run if not 0", 3 is "run if first bit is ~~negative~~ 1".B = 3-bit index for the stack to use for the conditional.C = 9-bit opcode (for extensibility).
gollark: By "really fast", I mean "in a few decaminutes, probably".
gollark: I suppose I could just specify it really fast.

See also

References
  1. Pant 1990, p. 11.
  2. Gazetteer of the Bombay Presidency: Sátára. Government Central Press. 1885. p. 622.
  3. Pant 1990, p. 9.
  4. Pant 1990, p. 10.

Bibliography
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