Current-mode logic

Current mode logic (CML), or source-coupled logic (SCL), is a differential digital logic family intended to transmit data at speeds between 312.5 Mbit/s and 3.125 Gbit/s across standard printed circuit boards.[1]

CML termination scheme

The transmission is point-to-point, unidirectional, and is usually terminated at the destination with 50 Ω resistors to Vcc on both differential lines. CML is frequently used in interfaces to fiber optic components.

CML signals have also been found useful for connections between modules. CML is the physical layer used in DVI and HDMI video links, the interfaces between a display controller and a monitor.[2]

In addition CML has been widely used in high-speed integrated systems, such as telecommunication systems such as: serial data transceivers, frequency synthesizers.

Operation

The fast operation of CML circuits is mainly due to their lower output voltage swing compared to the static CMOS circuits as well as the very fast current switching taking place at the input differential pair transistors. One of the primary requirements of a current-mode logic circuit is that the current bias transistor must remain in the saturation region in order to maintain a constant current.

Ultra low power

Recently, CML has been used in ultra-low power applications. Studies show that while the leakage current in conventional static CMOS circuits is becoming a major challenge in lowering the energy dissipation, good control of CML current consumption makes them a very good candidate for extremely low power use. Called subthreshold CML or subthreshold source coupled logic (STSCL),[3][4][5] the current consumption of each gate can be reduced down to a few tens of picoamps.

gollark: What do you mean "minus closures"‽
gollark: WASM is great apart from the giant binaries.
gollark: That would be horrible and bloated.
gollark: > Basicly, websites should of never gotten beyond just simple HTML stuffno.
gollark: ... a Lisp of some kind?

See also

  • Low-voltage differential signaling (LVDS) A differential standard used primarily for signals between modules.
  • Positive-referenced emitter-coupled logic, a differential signaling standard for high speed inter-module communications

References

  1. Serial Interface for Data Converters, JEDEC standard JESD204, April 2006
  2. "Understanding DVI‐D, HDMI And DisplayPort Signals" (PDF). Archived from the original (PDF) on 2013-11-02. Retrieved 2013-10-30.
  3. Tajalli, Armin; Vittoz, Eric; Brauer, Elizabeth J.; Leblebici, Yusuf. "Ultra low power subthreshold MOS current mode logic circuits using a novel load device concept". ESSCIRC 2007.
  4. Tajalli, Armin; Leblebici, Yusuf. Extreme low-power mixed signal IC design: subthreshold source-coupled circuits. Springer, New York. ISBN 978-1-4419-6477-9.
  5. Reynders, Nele; Dehaene, Wim (2015). Written at Heverlee, Belgium. Ultra-Low-Voltage Design of Energy-Efficient Digital Circuits. Analog Circuits And Signal Processing (ACSP) (1 ed.). Cham, Switzerland: Springer International Publishing AG Switzerland. doi:10.1007/978-3-319-16136-5. ISBN 978-3-319-16135-8. ISSN 1872-082X. LCCN 2015935431.
This article is issued from Wikipedia. The text is licensed under Creative Commons - Attribution - Sharealike. Additional terms may apply for the media files.