ARM Cortex-A5

ARM Cortex-A5
General Info
Launched	2011[1]
Designed by	ARM Holdings
Common manufacturer(s)	TSMC;
Cache
L1 cache	4–64 KB/4–64 KB
Architecture and classification
Microarchitecture	ARMv7-A
Physical specifications
Cores	1–4;

The ARM Cortex-A5 is a 32-bit processor core licensed by ARM Holdings implementing the ARMv7-A architecture announced in 2009.[1]

Overview

The Cortex-A5 is intended to replace the ARM9 and ARM11 cores for use in low-end devices.[1] The Cortex-A5 offers features of the ARMv7 architecture focusing on internet applications e.g. VFPv4 and NEON advanced SIMD.[2]

Key features of the Cortex-A5 core are:

Single-issue, in-order microarchitecture with an 8-stage pipeline[1]
NEON SIMD instruction set extension (optional)
VFPv4 floating-point unit (optional)
Thumb-2 instruction set encoding
Jazelle RCT
1.57 DMIPS / MHz

Chips

Several system-on-chips (SoC) have implemented the Cortex-A5 core, including:

Actions Semiconductor ATM7029 (gs702a) is a quad-core Cortex-A5 configuration
AMD Fusion APUs include a Cortex-A5 as a security co-processor[3]
Amlogic S805, M805 and A111
Analog Devices ADSP-SC57x, ADSP-SC58x series ARM Cortex-A5 + SHARC+ multicore DSP
Atmel SAMA5Dxx
Freescale Vybrid Series
NTC Module 1879VM8Ya (penta-core Cortex-A5, up to 800 MHz)
Qualcomm Snapdragon S1 MSM7x25A / MSM7x27A (up to 1.0GHz + Adreno 200)
Qualcomm Snapdragon S4 Play
Samsung Exynos 7420 (Cortex-A5 as an audio DSP)[4]
Spreadtrum SC8810 (single core A5 1 GHz + Mali400 GPU)

Development platform

Name	Processor	Controller Board	USB	serial ports	Ethernet	HDMI	LCD	CAN	Other	Operating system
MYD-JA5D2X	Atmel SAMA5D2 Cortex-A5	MYC-JA5D2X	3 x USB Host(1 x USB HSIC )	2 x RS232 (1 x Debug),1 xRS485	1 x 10/100Mpbs Ethernet	0	1 x LCD	1 x CAN	1 x LPFMC	Linux 4.1
MYD-JA5D44	Atmel SAMA5D4 Cortex-A5	MYC-JA5D44	3 x USB	2 x RS232 (1 x Debug),1 x RS485	2 x 10/100Mpbs Ethernet	1 x HDMI	1 x LCD	1 x CAN		Linux 3.18
MYD-SAMA5D3X	Atmel SAMA5D3 Cortex-A5	512/256MB DDR2, 256MB Nand Flash,16MB Nor Flash,4MB Data Flash	2 x USB Host,1 x USB OTG	2 x RS232 (1 x Debug),1 x RS485	Gigabit Ethernet	1 x HDMI	1 x LCD	2 x CAN		Linux 3.6.9, Android 4.0.4

gollark: But the borrow checker makes movement UTTERLY safe.

gollark: The Rust project I mostly recently worked on would, I feel, be apioformically irritating in C. Maybe not C++. I didn't try.

gollark: Imagine ever making mistakes in any circumstance.

gollark: (accidentally)

gollark: Yes, memory leaks are considered safe (but are at least very hard to invoke).

References

Jon Stokes (Oct 23, 2009). "ARM fills out CPU lineup with Cortex A5". Ars Technica. Retrieved 2012-10-18.
"Cortex-A5 Processor". February 2015.
Ryan Smith (2012-06-13). "AMD 2013 APUs To Include ARM Cortex-A5 Processor For TrustZone Capabilities". AnandTech. Retrieved 2012-10-17.
"The Samsung Exynos 7420 Deep Dive - Inside A Modern 14nm SoC". AnandTech. Retrieved 2015-06-15.

External links

ARM Holdings

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[ars-1] Jon Stokes (Oct 23, 2009). "ARM fills out CPU lineup with Cortex A5". Ars Technica. Retrieved 2012-10-18.

[2] "Cortex-A5 Processor". February 2015.

[3] Ryan Smith (2012-06-13). "AMD 2013 APUs To Include ARM Cortex-A5 Processor For TrustZone Capabilities". AnandTech. Retrieved 2012-10-17.

[4] "The Samsung Exynos 7420 Deep Dive - Inside A Modern 14nm SoC". AnandTech. Retrieved 2015-06-15.