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I have been going through the four types of data cache used in virtual memory, I came across this problem and I could not solve it.
Consider a Virtual Memory system with 20-bit virtual byte address, 1 KB pages, and 16-bit physical byte address. Suppose a direct mapped data cache contains 8 bytes in a single cache line. How many maximum number of cache lines can we allocate in a cache if we desire to implement a virtually indexed but physically tagged cache?
I know it uses virtual address for the index and physical for the tag, but it doesn't make sense to me, any solutions?
alexhilton
Posted 2014-05-09T04:52:56.700
Reputation: 109
Since the index bits are taken from the virtual address and must match the physical address (assuming reprobing is not done on a cache miss to detect aliases or page coloring used to avoid them) and the page size is 1 KiB, there will be 10 bits of virtual address that are also physical and 3 of those bits are used for the offset into the 8-byte cache line, so 7 bits can be used to index the cache (so 128 lines with a direct-mapped cache). – Paul A. Clayton – 2014-11-16T00:02:01.630