0
In SMT (simultaneous multithreading) processors in which threads share the TLB, how does the TLB differentiate one thread's access from the other one? Each thread has its own set of pages loaded into memory, and independent threads do not share pages. I would guess there is some kind of hardware support for that in TLB, like some extra bits. But I would like to know more details.
aminfar
Posted 2012-01-27T01:47:18.123
Reputation: 139
Many ISAs support Address Space IDs, which allow a single TLB to be shared by multiple processes/address spaces. (I think x86 somewhat recently added this feature; I know it has such for virtual machines, initially only 1 bit, but latter extended, if I recall correctly.) Without such "tag extensions", the TLB would typically be partitioned (much like the return address predictor and some other structures). – Paul A. Clayton – 2014-10-04T21:33:30.297
1@aminfar The section you cite mentions Address Space Numbers (the same thing as ASIDs, sometimes called Process IDs), which are defined for the Alpha ISA. (Number is probably a more correct but less common name since numbers may be reused [with appropriate TLB invalidations] so they are not unique identifiers which is somewhat implied by ID.) These are the "extra bits" that distinguish the pages from different processes (address spaces). – Paul A. Clayton – 2014-10-05T18:51:37.147
all right. Process ID distinguishes pages from different processes. That I understand. If we have threads from the very same process, do we need to distinguish their pages from one another in TLB? It seems like we don't. Can you clarify this? – aminfar – 2014-10-05T19:23:54.427
1@aminfar Threads within a process (in the usual way that threads are handled) do not have different page access permissions or other metadata and so do not need any distinction in the TLB. – Paul A. Clayton – 2014-10-06T01:45:01.967
if threads are from different processes, then they don't have the same view of memory. So their virtual to physical page mapping is different. In SMT processors, two (or more, depending on implementation) threads from different processes can be run at the same time. So as far as I know, they share the same TLB. – aminfar – 2012-01-27T04:06:39.220
1
There are two different basic TLB designs. In one, the TLB is per-virtual-core, and the entire TLB is flushed if the vm changes. In the other, the TLB can be shared among cores or not, is not flushed when the vm changes, but contains a tag indicating which vm the entry is for.
– David Schwartz – 2012-01-27T04:09:54.903@aminfar, AFAIK if the threads are from two different processes, then I don't think that's any different than 2 processes sharing the TLB. Some cpus support sharing (TLB entries are marked to identify the process to which it belongs), others clear the TLB on context switch. – Peon – 2012-01-27T04:13:27.090
take a look at www.cs.washington.edu/research/smt/papers/os.ps, section 2.2.2 to see what I am saying. – aminfar – 2012-01-27T04:16:08.177