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I'm wondering about how a Virtual Memory system could be managed alongside with a MMU when there's the need to mantain some "fixed" addresses in the address space.
For example, when a machine boots up, the CPU starts reading the first instruction from a fixed address (that is mapped to some kind of ROM), then gives addresses to pheriperals (if the Memory Mapped I/O system is used), and then the OS is bootstrapped. I also know that interrupt routines and such things need to be at "fixed" position in memory, and these things are loaded by the OS.
I may think that MMU is disabled in such a process and then it is enabled after the OS loaded.
I may think that the processes above uses system address space and that the system address space is not virtualized, despite the user address space actually is.
This will result in a pool of physical addresses that remains the same in order to access I/O peripherals, interrupt routines and so on, and a virtual user space managed by the MMU, where the processes can elaborate all the data they needs to elaborate, demanding to the OS the access to I/O peripherals.
But i'm not sure of these things. So I ask you, when the MMU is actually enabled? Does it deal with all the addresses, or only with the ones of the user space? Is it true that some addresses can bypass the MMU even when the system is running, in order to access fixed memory positions? Or am I missing some important clues?
This makes sense! So either the SO uses a "1:1" memory mapping or disables the MMU at all in kernel mode... Things like DMAs controllers, that are given a base address and a buffer size to transfer data directly from or to RAM, using therefore addresses that are sequentially, are managed in the kernel space? – iMineLink – 2014-02-03T16:02:54.293
There's some details of the Windows bootloader in http://channel9.msdn.com/Shows/Going+Deep/Inside-Windows-8-Chris-Stevens-Boot-Environment
– David Marshall – 2014-02-03T17:15:36.793DMA probably works on the physical address level only - though newer CPUs have an IOMMU that may allow translation of device I/O addresses. – LawrenceC – 2014-02-03T17:29:32.100
@DavidMarshall thanks for the video, I've downloaded it and I will see it as soon as possible.