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I read a research paper, in which the author has shown a graph which shows how much traffic coming to DRAM is from (i)Page table walk Access, (ii)from replay memory access and (iii)other memory access (for different programs).
I'm particularly interested in knowing how to differentiate between the traffic coming to DRAM from page table walker, and other traffic.
In the methodology section the author says that 'we used modified version of Pin (logging both virtual and physical memory addresses) to generate memory traces of program behavior. We then feed these traces to an in-house simulation framework modeling Intel’s Skylake-style processors with the parameters'. I was not able to understand that part at all, is it Pin which differentiates the traffic or is it the in-house simulator he used. And if it is the latter is there any open-source simulator available which can do the same?
In case you need to know the research paper, it was 'Translation Triggered Prefetching' by Abhishek Bhattacharjee.