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I'm trying to diagnose an underperforming PCI-E card in my system, and I've realized that it's negotiating the wrong link-width. Specifically, from running lspci -vv
, I see:
LnkCap: Port #1, Speed 8GT/s, Width x8, ASPM L1, Exit Latency L0s <4us, L1 <4us
ClockPM- Surprise- LLActRep- BwNot-
while
LnkSta: Speed 8GT/s, Width x4, TrErr- Train- SlotClk- DLActive- BWMgmt- ABWMgmt-
My question is: does this negotiation happen at the hardware level or at the software level? Put another way, does the card negotiate directly with the PCI-E slot, or does this happen somewhere in the drivers?
(If this turns out to be an obvious answer, please forgive me...after trying to diagnose this for a week, my mind is a bit fried.)
2I'm not sure what is more exciting about this answer - that it's so exquisitely detailed (seriously, this is beautiful, and I love learning new things), or that it helped me solve the problem in about 5 minutes. I ended up having to modify the configurations on my board - it's a dev board and it looks like it got reset at some point. – tonysdg – 2016-06-29T18:48:41.977