How does physical distance between processor and memory/cache affect data transfer speeds

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The L1 cache is situated inside the cpu to speed up the process of data access but since electrical signals travel at the speed of light(almost constant) which is blazingly fast then how does distance come into consideration.
For light to travel a distance of 2 cm vs a distance of 10cm won't be a great deal and time taken to reach both the points would be almost be the same, then why is it said that, the closer the component is to the cpu the faster the cpu can access it.
Another question is that, What is clock speed of a cpu and how does it affect data transfer speeds.

Shivam Aggarwal

Posted 2016-01-04T05:39:58.300

Reputation: 189

You hit it: it's the speed of light thing, or, really, the speed of electricity in copper (about 1/3 the speed of light). You need to understand how incredibly fast processors are now,, and the latency between a request and response doubles the distance. – Ron Maupin – 2016-01-04T05:43:55.607

But still at a speed 1/3rd of light 2-10 cm wont matter much . – Shivam Aggarwal – 2016-01-04T05:45:35.130

It does. Do the math, and remember to double the distance. – Ron Maupin – 2016-01-04T05:48:06.997

Sorry I'm a noob at these things. Please help :) – Shivam Aggarwal – 2016-01-04T05:54:17.880

@Shivamaggarwal - Help you with what exactly? You state that the distance does not matter, except it does, so your question on its fundamentals is based on your incorrect understand of a core concept. – Ramhound – 2016-01-04T13:12:53.040

@Ramhound yes my incorrect understanding might be the reason for my fuzziness. My direct question is that "IS DISTANCE ALSO A DECIDING FACTOR FOR DATA TRANSFER SPEEDS BETWEEN CPU AND CACHE/MEMORY ?" even though data transfers at almost speed of light. – Shivam Aggarwal – 2016-01-04T13:19:41.483

@Shivamaggarwal - Yes; – Ramhound – 2016-01-04T13:22:03.917

How then ?(which was my original question) – Shivam Aggarwal – 2016-01-04T13:26:46.627

Answers

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For a microprocessor cache, resistive-capacitive delay is significant. As Wikipedia notes, this delay is proportional to the square of length. To reduce this delay, repeaters can be inserted, but these add logic delay. Another (lesser) delay factor is in address decoding; each doubling of size requires one more row decoder to address the appropriate row of bits.

Paul A. Clayton

Posted 2016-01-04T05:39:58.300

Reputation: 1 153